[MaDDoG]

Периодически возникает проблема, валяться input error, как следствие камень в полку и сопутствубщие проблемы. Кошка является бордером - 2fw и несколько пиров.

 

sh ver
Cisco IOS Software, 7200 Software (C7200P-ADVIPSERVICESK9-M), Version 12.4(4)XD10, RELEASE SOFTWARE (fc2)
Technical Support: http://www.cisco.com/techsupport
Copyright (c) 1986-2007 by Cisco Systems, Inc.
Compiled Fri 28-Dec-07 14:12 by karnagar

ROM: System Bootstrap, Version 12.4(12.2r)T, RELEASE SOFTWARE (fc1)
BOOTLDR: Cisco IOS Software, 7200 Software (C7200P-KBOOT-M), Version 12.4(4)XD5, RELEASE SOFTWARE (fc1)

c7204 uptime is 2 weeks, 1 day, 21 hours, 43 minutes
System returned to ROM by error - a SegV exception, PC 0x15EA568 at 16:23:44 Vld Wed Dec 24 2008
System image file is "disk2:c7200p-advipservicesk9-mz.124-4.XD10.bin"


This product contains cryptographic features and is subject to United
States and local country laws governing import, export, transfer and
use. Delivery of Cisco cryptographic products does not imply
third-party authority to import, export, distribute or use encryption.
Importers, exporters, distributors and users are responsible for
compliance with U.S. and local country laws. By using this product you
agree to comply with applicable laws and regulations. If you are unable
to comply with U.S. and local laws, return this product immediately.

A summary of U.S. laws governing Cisco cryptographic products may be found at:
http://www.cisco.com/wwl/export/crypto/tool/stqrg.html

If you require further assistance please contact us by sending email to
export@cisco.com.

Cisco 7204VXR (NPE-G2) processor (revision A) with 917504K/65536K bytes of memory.
Processor board ID 16070839
MPC7448 CPU at 1666Mhz, Implementation 0, Rev 2.2
4 slot VXR midplane, Version 2.0

Last reset from power-on

PCI bus mb1 (Slots 1, 3 and 5) has a capacity of 600 bandwidth points.
Current configuration on bus mb1 has a total of 0 bandwidth points.
This configuration is within the PCI bus capacity and is supported.

PCI bus mb2 (Slots 2, 4 and 6) has a capacity of 600 bandwidth points.
Current configuration on bus mb2 has a total of 0 bandwidth points.
This configuration is within the PCI bus capacity and is supported.

Please refer to the following document "Cisco 7200 Series Port Adaptor
Hardware Configuration Guidelines" on Cisco.com <http://www.cisco.com>
for c7200 bandwidth points oversubscription and usage guidelines.


1 FastEthernet interface
3 Gigabit Ethernet interfaces
2045K bytes of NVRAM.

250880K bytes of ATA PCMCIA card at slot 2 (Sector size 512 bytes).
65536K bytes of Flash internal SIMM (Sector size 512K).
Configuration register is 0x2102

 

interface GigabitEthernet0/1
description To Catalyst gi 4/12
no ip address
no ip redirects
no ip unreachables
no ip proxy-arp
duplex full
speed 1000
media-type sfp
negotiation auto
no cdp enable
end

 

 

sh int gi 0/1
GigabitEthernet0/1 is up, line protocol is up
  Hardware is MV64460 Internal MAC, address is 0030.7b54.181b (bia 0030.7b54.181b)
  MTU 1500 bytes, BW 1000000 Kbit, DLY 10 usec,
     reliability 255/255, txload 32/255, rxload 32/255
  Encapsulation 802.1Q Virtual LAN, Vlan ID  1., loopback not set
  Keepalive set (10 sec)
  Full-duplex, 1000Mb/s, link type is autonegotiation, media type is LX
  output flow-control is XON, input flow-control is XON
  ARP type: ARPA, ARP Timeout 04:00:00
  Last input 00:00:00, output 00:00:00, output hang never
  Last clearing of "show interface" counters 1w2d
  Input queue: 1/75/726615/0 (size/max/drops/flushes); Total output drops: 0
  Queueing strategy: fifo
  Output queue: 0/40 (size/max)
  5 minute input rate 128300000 bits/sec, 30466 packets/sec
  5 minute output rate 129030000 bits/sec, 31029 packets/sec
     1239039400 packets input, 3057477158 bytes, 0 no buffer
     Received 48831 broadcasts, 0 runts, 0 giants, 0 throttles
     673567 input errors, 0 CRC, 0 frame, 0 overrun, 673567 ignored
     0 watchdog, 123396 multicast, 0 pause input
     0 input packets with dribble condition detected
     1313054779 packets output, 2242013173 bytes, 0 underruns
     1 output errors, 0 collisions, 1 interface resets
     0 babbles, 0 late collision, 0 deferred
     1 lost carrier, 0 no carrier, 0 pause output
     0 output buffer failures, 0 output buffers swapped out

 

Заранее благодарен.

 

[Britney]

скорее всего проблемы возникают в момент перегрузки проца, по крайней мере у нас такие же ошибки с этим связаны

 

прочитал сейчас, что проц ложится, вот как раз проц влияет на образование ошибок

[MaDDoG]

скорее наоборот, потому что загрузка камня при максимальной, при трафике 350 мегабит и примерно 100кpps, (не аномальной) нагрузке 25%.